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F75111
F75111R/F75111RG/F75111N
Low Power GPIO Datasheet
Release Date: July, 2007 Revision: V0.27P
July 2007
F75111
F75111 Datasheet Revision History
Version 0.20P 0.21P 0.22P Date 01/04/2003 09/04/2003 02/06/2003 6~8 7~8 38~39 Page Revision History Internal Use Preliminary Public Version Add F75111N pin configuration and description (1) Revised pin description of LED function (2) Revised electron characteristic(operating temperature) (3) Revised DC spec (Input high/low leakage current) 0.23P 0.24P 0.25P 0.26P 0.27P 12/29/2003 4/26/2004 1/12/2005 7/14/2005 7/5/2007 21,28 7,8 8,9 36,39 Update register description( Index 0x18, 0x28) Update pin description of GPIO pin Revise SMBus access timing Modify AC Characteristics and delete version ID register Add company address
Please note that all data and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this data sheet belong to their respective owners.
LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Fintek for any damages resulting from such improper use or sales.
July 2007
F75111
Table of Contents
1. GENERAL DESCRIPTION .......................................................................................................................................- 4 2. FEATURES................................................................................................................................................................- 4 3. KEY SPECIFICATIONS ............................................................................................................................................- 4 4. PIN CONFIGURATION .............................................................................................................................................- 5 5. PIN DESCRIPTION ...................................................................................................................................................- 6 5.1 POWER PIN ........................................................................................................................................................ - 6 5.2 GPIO FUNCTION ................................................................................................................................................ - 6 6. FUNCTIONAL DESCRIPTION..................................................................................................................................- 8 6.1 GENERAL DESCRIPTION ...................................................................................................................................... - 8 6.2 ACCESS INTERFACE ............................................................................................................................................ - 8 6.3 THE SMBUS ACCESS TIMING ARE SHOWN AS FOLLOW: .......................................................................................... - 8 7. REGISTERS DESCRIPTION ....................................................................................................................................- 9 7.1 CONFIGURATION AND CONTROL REGISTER - INDEX 01H ....................................................................................... - 9 7.2 STATUS REGISTER - INDEX 02H ........................................................................................................................ - 10 7.3 CONFIGURATION AND FUNCTION SELECT REGISTER - INDEX 03H......................................................................... - 10 7.4 PIN MODE FUNCTION SELECT REGISTER - INDEX 04H ......................................................................................... - 11 7.5 PIN MODE FUNCTION SELECT REGISTER - INDEX 05H ......................................................................................... - 11 7.6 LED FREQ CONTROL REGISTER - INDEX 06H .................................................................................................... - 12 7.7 LED FREQ CONTROL REGISTER - INDEX 07H .................................................................................................... - 13 7.8 LED FREQ CONTROL REGISTER - INDEX 08H .................................................................................................... - 13 7.9 LED FREQ CONTROL REGISTER - INDEX 09H .................................................................................................... - 14 7.10 GPIO1X OUTPUT CONTROL REGISTER - INDEX 10H ........................................................................................ - 15 7.11 GPIO1X OUTPUT DATA REGISTER - INDEX 11H................................................................................................ - 16 7.12 GPIO1X INPUT STATUS REGISTER - INDEX 12H ............................................................................................... - 16 7.13 GPIO1X LEVEL/PULSE CONTROL REGISTER - INDEX 13H ................................................................................ - 17 7.14 GPIO1X PULSE WIDTH CONTROL REGISTER - INDEX 14H................................................................................ - 17 7.15 GPIO1X PULL-UP RESISTOR CONTROL REGISTER - INDEX 15H........................................................................ - 18 7.16 GPIO1X INPUT DE-BOUNCE REGISTER - INDEX 16H ........................................................................................ - 18 7.17 GPIO1X PULSE INVERSE REGISTER - INDEX 17H ............................................................................................ - 19 7.18 GP1X EDGE DETECTOR ENABLE REGISTER - INDEX 0X18 ............................................................................... - 19 7.19 GP1X EDGE DETECTOR STATUS REGISTER - INDEX 0X19 ............................................................................... - 20 7.20 GP1X IRQ OR SMI# ENABLE REGISTER - INDEX 0X1A.................................................................................... - 21 -
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7.21 GP1X OUTPUT DRIVING ENABLE - INDEX 0X1B............................................................................................... - 21 7.22 GP1X OUTPUT DRIVING ENABLE - INDEX 0X1C............................................................................................... - 22 7.23 GPIO2X OUTPUT CONTROL REGISTER - INDEX 20H ........................................................................................ - 23 7.24 GPIO2X OUTPUT DATA REGISTER - INDEX 21H ............................................................................................... - 23 7.25 GPIO2X INPUT STATUS REGISTER - INDEX 22H ............................................................................................... - 24 7.26 GPIO2X LEVEL/PULSE CONTROL REGISTER - INDEX 23H ................................................................................ - 24 7.27 GPIO2X PULSE WIDTH CONTROL REGISTER - INDEX 24H................................................................................ - 25 7.28 GPIO2X PULL-UP RESISTOR CONTROL REGISTER - INDEX 25H........................................................................ - 25 7.29 GPIO2X INPUT DE-BOUNCE REGISTER - INDEX 26H ........................................................................................ - 25 7.30 GPIO2X PULSE INVERSE REGISTER - INDEX 27H ............................................................................................ - 26 7.31 GP2X EDGE DETECTOR ENABLE REGISTER - INDEX 0X28 ............................................................................... - 27 7.32 GP2X EDGE DETECTOR STATUS REGISTER - INDEX 0X29 ............................................................................... - 28 7.33 GP2X IRQ OR SMI# ENABLE REGISTER - INDEX 0X2A.................................................................................... - 28 7.34 GP2X OUTPUT DRIVING ENABLE - INDEX 0X2B............................................................................................... - 29 7.35 GP2X OUTPUT DRIVING ENABLE - INDEX 0X2C............................................................................................... - 29 7.36 WDTOUT CONTROL REGISTER - INDEX 34H................................................................................................... - 30 7.37 WDTOUT10 CONTROL REGISTER - INDEX 35H............................................................................................... - 30 7.38 WATCHDOG TIMER CONTROL REGISTER - INDEX 36H....................................................................................... - 31 7.39 WATCHDOG TIMER RANGE REGISTER - INDEX 37H........................................................................................... - 31 7.40 GPIO3X OUTPUT CONTROL REGISTER - INDEX 40H ........................................................................................ - 32 7.41 GPIO3X OUTPUT DATA REGISTER - INDEX 41H ............................................................................................... - 32 7.42 GPIO3X INPUT STATUS REGISTER - INDEX 42H ............................................................................................... - 32 7.43 GPIO3X LEVEL/PULSE CONTROL REGISTER - INDEX 43H ................................................................................ - 33 7.44 GPIO3X PULSE WIDTH CONTROL REGISTER - INDEX 44H................................................................................ - 33 7.45 GPIO3X INPUT DE-BOUNCE REGISTER - INDEX 46H ........................................................................................ - 33 7.46 GPIO3X PULSE INVERSE REGISTER - INDEX 47H ............................................................................................ - 34 7.47 GP3X EDGE DETECTOR ENABLE REGISTER - INDEX 0X48 ............................................................................... - 34 7.48 GP3X EDGE DETECTOR STATUS REGISTER - INDEX 0X49 ............................................................................... - 34 7.49 GP3X IRQ OR SMI# ENABLE REGISTER - INDEX 0X4A.................................................................................... - 35 7.50 GP3X OUTPUT DRIVING ENABLE - INDEX 0X4C............................................................................................... - 35 7.51 CHIPID(1) REGISTER - INDEX 5AH................................................................................................................. - 36 7.52 CHIPID(2) REGISTER - INDEX 5BH................................................................................................................. - 36 7.53 VENDOR ID(1) REGISTER - INDEX 5DH ......................................................................................................... - 36 7.54 VENDOR ID(2) REGISTER - INDEX 5EH ......................................................................................................... - 36 8. ELECTRON CHARACTERISTIC............................................................................................................................- 37 8.1 ABSOLUTE MAXIMUM RATINGS........................................................................................................................... - 37 -
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8.2 DC CHARACTERISTICS...................................................................................................................................... - 37 8.3 AC CHARACTERISTICS ...................................................................................................................................... - 39 9. ORDERING INFORMATION ...................................................................................................................................- 40 10. PACKAGE DIMENSIONS ....................................................................................................................................- 40 F75111 DEMO CIRCUIT........................................................................................................................................... - 43 -
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F75111 1. General Description
F75111 is a low power general purpose IO chip providing 20 GPIO. Most GPIO pins can be programmed to be power LED. Level or pulse modes can be programmed by registers. Two power-down modes (manual or Smart) can be selected to save power and control the total consumption under 10uA, so F75111 can fit the requirement of mobile device such as Smart Phone, PDA or cell phone.
2. Features
Support up to 20 GPIO pins Two power down mode selection --- Manual or Smart Power Management mode 15 pins can be programmed to be LED Each GPIO pin can be programmed to be high/low level or pulse Each GPIO pin has de-bounce function Two sets of watch dog timer SMBus address selected pin to expand up to 2 devices SMBus interface 3VCC operation Package in 28-SSOP(150mil) / 24QFN package(4mm x 4mm)
3. Key Specifications
Supply Voltage Operating Supply Current Power Down Current 3.0V to 3.6V 300uA typ. 3uA typ.
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F75111 4. Pin Configuration
VSB3V GPIO30 GPIO13/I2C_ADDR GPIO16/LED GPIO17/LED GPIO20/LED GPIO21/LED GPIO22/LED GPIO14/LED GPIO10/LED/WDTOUT2# GPIO11/LED GPIO12/LED/IRQ/WDTOUT11# SDATA SCLK
1 2 3 4 5
28 27 26 25 24
SEL GPIO31 GPIO32 GPIO33 GPIO23/LED GPIO24/LED GPIO25/LED GPIO26/LED GPIO27/LED GPIO15/LED VSB3V GND GND WDTOUT10#
F75111R
6 7 8 9 10 11 12 13 14
23 22 21 20 19 18 17 16 15
GPIO26/LED
18 17 16 15 14 13
GPIO25/LED GPIO24/LED GPIO23/LED GPIO33 GPIO32 GPIO31
GPIO27/LED
2
GPIO15/LED
SDATA
SCLK
GND
19 20 21 22 23 24 1 3 4 5 6
12 GPIO12/LED/IRQ/WDTOUT11# 11 GPIO11/LED
F75111N
10 GPIO10/LED/WDTOUT2# 9 8 7
GPIO14/LED GPIO22/LED GPIO21/LED
VSB3V
GPIO30
GPIO13/I2C_ADDR
GPIO16/LED
GPIO17/LED
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GPIO20/LED
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F75111 5. Pin Description
I/O12t I/O12ts I/OOD12t I/OD12 OUT12 I/O14t I/OOD16t OD12 OD14 OD14ts INt INts P - TTL level bi-directional pin with 12 mA source-sink capability - TTL level and schmitt trigger - TTL level bi-directional pin, can select to OD or OUT by register, with 12 mA source-sink capability - TTL level bi-directional pin, Open-drain outpu with 12 mA sink capability - Output pin with 12 mA source-sink capability - TTL level bi-directional pin with 14 mA source-sink capability - TTL level bi-directional pin, can select to OD or OUT by register, with 16 mA source-sink capability - Open-drain output pin with 12 mA sink capability - Open-drain output pin with 14 mA sink capability - Open-drain output pin with 14 mA sink capability, TTL level and schmitt trigger - TTL level input pin - TTL level input pin and schmitt trigger - Power
5.1 Power Pin
Pin No. F75111R/RG 1,18 16,17 F75111N 1 15 VSB3V GND P P Standard Power Supply Voltage Input with 3.3V GND Pin Name Type Description
5.2 GPIO Function
Pin No. F75111R/RG 4~9 F75111N 4~9 GPIO16/17/20/ 21/22/14 LED I/OOD16ts
(5V Tolerance)
Pin Name
Type
Description
General purpose I/O pins.
OD16
LED control output. The multi-function pin is selected by register, so does the freq. programming
19~24
16~21
GPIO15/27/26/ 25/24/23 LED
I/OOD16ts
(5V Tolerance)
General purpose I/O pins.
OD16
LED control output. The multi-function pin is selected by register, so does the freq. programming
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2, 27~25 2, 22~24 GPIO30/33/32/ 31 3 3 GPIO13 I/OD12ts
(5V Tolerance)
General purpose I/O pins.
I/O16ts
(5V Tolerance)
General purpose I/O pin.
I2C_ADDR
INtsd100k
The SMBus hardware power on setting pin. Default address is 0x9C (when I2C_ADDR=0). Another one is 0x6E (when
I2C_ADDR=1). This pin internal pull-down 100k to Ground. If this pin is pull-up 10k to VSB3V, this pin will be trapped to 1. 10 10 GPIO10 I/OOD16ts
(5V Tolerance)
General purpose I/O pin.
LED
OD16
LED control output. The multi-function pin is selected by register, so does the freq. programming
WDTOUT2# 11 11 GPIO11
OD16 I/OOD16ts
(5V Tolerance)
The 2nd Watch Dog Timer time out output General purpose I/O pin.
LED
OD16
LED control output. The multi-function pin is selected by register, so does the freq. programming
12
12
GPIO12
I/OOD16ts
(5V Tolerance)
General purpose I/O pin.
LED
OD16
LED control output. The multi-function pin is selected by register, so does the freq. programming
IRQ WDTOUT11#
OD16 OD16
IRQ and SMI# function The 1st Watch Dog Timer time out output. System reset signal when the Reset-Out timer is time out. This pin will generate 100mS pulse (default) when the Reset-Out timer is timeout.
15
-
WDTOUT10#
OD12
The 1st Watch Dog Timer time out output. System reset signal when the Reset-Out timer is time out. This pin will generate 100mS pulse (default) when the Reset-Out timer is timeout.
28 13 14
13 14
SEL SDATA SCLK
INtsd100k I/OD12ts INt s
Default pull down. SMBus data. SMBus clock
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F75111 6. Functional Description
6.1 General Description
Dedicate GPIO functions. That includes two sets of watchdog timer. One Set of Watchdog timer timeout unit is set to second and range is 0 to 127 seconds. The other Watchdog timer is set to second or minute and the range is 0 to 256 seconds or minutes. When the timeout has occurred, that will generate a status bit to indicate it and write one will be clear. All GPIO can be programmed to logic one or zero or high pulse or low pulse.
6.2 Access Interface
The F75111 provides one serial access interface, I2C Bus, to read/write internal registers. The address of Serial Bus is configurable by using power-on trapping of standby power VBS3V. The pin 3 (GPIO13/I2C _ADDR) is multi-function pin. During the VSB3V power-on, this pin serves as input detection of logic high or logic low. This pin is default pull-down resistor with 100K ohms mapping the Serial Bus address 0x9C (1001_1100). Another Serial Bus address 0x6E (0110_1110) is set when external pull-up resistor with 10K ohms is connected in this pin.
6.3 The SMBus access timing are shown as follow:
(a) SMBus write to internal address register followed by the data byte
0 SCL SDA
Start By Master
7
8
0
7
8
1
0
0
1
1
1
0
R/W
Ack by 111
D7
D6
D5
D4
D3
D2
D1
D0
Ack by 111
Frame 1 Serial Bus Address Byte 0
Frame 2 Internal Index Register Byte
7 SCL (Continued) SDA (Continued) D7 D6 D5 D4 D3 D2 D1 D0
8
Stop by Master
Frame 3 Data Byte
Figure 1. Serial Bus Write to Internal Address Register followed by the Data Byte
(b) Serial bus write to internal address register only
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F75111
0 SCL SDA
Start By Master
7
8
0
7
8
1
0
0
1
1
1
0
R/W
Ack by 111
D7
D6
D5
D4
D3
D2
D1
D0
Ack by 111 Stop by Master
Frame 1 Serial Bus Address Byte 0
Frame 2 Internal Index Register Byte
Figure 2. Serial Bus Write to Internal Address Register Only
(c) Serial bus read from a register with the internal address register prefer to desired location
0 SCL SDA
Start By Master
7
8
0
7
8
1
0
0
1
1
1
0
R/W
Ack by 111
D7
D6
D5
D4
D3
D2
D1
D0
Ack by Master Stop by Master
Frame 1 Serial Bus Address Byte 0
Frame 2 Internal Index Register Byte
Figure 3. Serial Bus Read from Internal Address Register
7. Registers Description
7.1 Configuration and Control Register - Index 01h
Power-on default [7:0] =0000_1000b
Bit 7 6 5 INIT
Name
R/W R/W R/W R/W
PWR VSB3V VSB3V VSB3V
Description Software reset for all registers including Test Mode registers. Users use only.
Reserved EN_WDT10
Enable Reset Out. If set to 1, enable WDTOUT10# output. Default is disable.
4 3 2 1
Reserved Reserved Reserved SMART_POW R_MANAGEM ENT
R/W R/W R/W R/W
VSB3V VSB3V VSB3V VSB3V Set this bit to 1 will enable auto power down mode, when all function are idle then 20ms the chip will auto power down, it will wakeup when GPIO state change or read write register
0
SOFT_POWR_ DOWN
R/W
VSB3V
Set this bit to 1 will power down all of the analog block and stop internal clock, write 0 to clear this bit or when GPIO state change will auto clear this bit to 0.
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7.2 Status Register - Index 02h
Power-on default [7:0] =0000_000xb
Bit 7-4 3 2 1
Name Reserved POWR_DOWN Reserved I2C_ADDR
R/W RO RO RO RO
PWR VSB3V VSB3V VSB3V VSB3V
Description
If this bit is set to 1, it mean the chip is in power down mode Read back will be "0" GPIO serial bus address Select. Internal pull-down 100K ohms are address 0x9C. If external is pull-up 4.7K ohms, the address is 0x6E. This pin is trapped during the VSB3VOK.
0
Reserved
RO
VSB3V
7.3 Configuration and function select Register - Index 03h
Power-on default [7:0] =0000_0000b
Bit 7 6
Name Reserved IRQ_LEVEL
R/W RO R/W
PWR VSB3V VSB3V
Description
Select IRQ Polarity (Level). Set to 1, IRQ is low active and SMI# is high active. Default, the IRQ is high active and SMI# is low active.
5
IRQ_MODE
R/W
VSB3V
IRQ/SMI# mode select. 0 - Level mode (IRQ mode), 1 - Pulse Mode (SMI# mode). If pulse mode is selected, the active pulse is over 100us.
4-3
PIN12_MODE
R/W
VSB3V
00: GPIO12 01: LED12 IN this mode can use REG 0x06(bit5,4) to select LED frequency. 10: IRQ 11: WDTOUT11#:
2
PIN11_MODE
R/W
VSB3V
0: GPIO11 1: LED11 IN this mode can use REG 0x06(bit3,2) to select LED frequency.
1-0
PIN10_MODE
R/W
VSB3V
00: GPIO10 01: LED10 IN this mode can use REG 0x06(bit1,0) to select LED frequency. 10,11: WD_OUT
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7.4 Pin mode function select Register - Index 04h
Power-on default [7:0] =0000_0000b
Bit 7
Name PIN20_MODE
R/W R/W
PWR VSB3V 0: GPIO27
Description
1: LED27 IN this mode can use REG 0x09(bit7, 6) to select LED frequency. 6 PIN19_MODE R/W VSB3V 0: GPIO15 1: LED15 IN this mode can use REG 0x07(bit3, 2) to select LED frequency. 5 PIN9_MODE R/W VSB3V 0: GPIO14 1: LED14 IN this mode can use REG 0x07(bit1, 0) to select LED frequency. 4 PIN8_MODE R/W VSB3V 0: GPIO22 1: LED22 IN this mode can use REG 0x08(bit5, 4) to select LED frequency. 3 PIN7_MODE R/W VSB3V 0: GPIO21 1: LED21 IN this mode can use REG 0x08(bit3, 2) to select LED frequency. 2 PIN6_MODE R/W VSB3V 0: GPIO20 1: LED20 IN this mode can use REG 0x08(bit1, 0) to select LED frequency. 1 PIN5_MODE R/W VSB3V 0: GPIO17 1: LED17 IN this mode can use REG 0x07(bit7, 6) to select LED frequency. 0 PIN4_MODE R/W VSB3V 0: GPIO16 1: LED16 IN this mode can use REG 0x07(bit5, 4) to select LED frequency.
7.5 Pin mode function select Register - Index 05h
Power-on default [7:0] =0000_0000b
Bit 7-4 3
Name Reserved PIN24_MODE
R/W RO R/W
PWR
Description
VSB3V
0: GPIO23
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F75111
1: LED23 IN this mode can use REG 0x08(bit7, 6) to select LED frequency. 2 PIN23_MODE R/W VSB3V 0: GPIO24 1: LED24 IN this mode can use REG 0x09(bit1, 0) to select LED frequency. 1 PIN22_MODE R/W VSB3V 0: GPIO25 1: LED25 IN this mode can use REG 0x09(bit3, 2) to select LED frequency. 0 PIN21_MODE R/W VSB3V 0: GPIO26 1: LED26 IN this mode can use REG 0x09(bit5, 4) to select LED frequency.
7.6 LED Freq Control Register - Index 06h
Power-on default [7:0] =0000_0000b
Bit 7-6 5-4
Name Reserved LED12_FREQ
R/W R/W R/W
PWR VSB3V VSB3V LED output frequency. Bit 00 01 10 11
Description
Description Tri-state (default). 0.5Hz (period is 2 seconds, duty cycle is 50%) 1 Hz (period is 1 second) Low.
3-2
LED11_FREQ
R/W
VSB3V
LED output frequency. Bit 00 01 10 11 Description Tri-state (default). 0.5Hz (period is 2 seconds, duty cycle is 50%) 1 Hz (period is 1 second) Low.
1-0
LED10_FREQ
R/W
VSB3V
LED output frequency. Bit 00 01 10 11 Description Tri-state (default). 0.5Hz (period is 2 seconds, duty cycle is 50%) 1 Hz (period is 1 second) Low.
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7.7 LED Freq Control Register - Index 07h
Power-on default [7:0] =0000_0000b
Bit 7-6
Name LED17_FREQ
R/W R/W
PWR VSB3V LED output frequency. Bit 00 01 10 11
Description
Description Tri-state (default). 0.5Hz (period is 2 seconds, duty cycle is 50%) 1 Hz (period is 1 second) Low.
5-4
LED16_FREQ
R/W
VSB3V
LED output frequency. Bit 00 01 10 11 Description Tri-state (default). 0.5Hz (period is 2 seconds, duty cycle is 50%) 1 Hz (period is 1 second) Low.
3-2
LED15_FREQ
R/W
VSB3V
LED output frequency. Bit 00 01 10 11 Description Tri-state (default). 0.5Hz (period is 2 seconds, duty cycle is 50%) 1 Hz (period is 1 second) Low.
1-0
LED14_FREQ
R/W
VSB3V
LED output frequency. Bit 00 01 10 11 Description Tri-state (default). 0.5Hz (period is 2 seconds, duty cycle is 50%) 1 Hz (period is 1 second) Low.
7.8 LED Freq Control Register - Index 08h
Power-on default [7:0] =0000_0000b
Bit
Name
R/W
PWR
Description
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7-6 LED23_FREQ R/W VSB3V LED output frequency. Bit 00 01 10 11 5-4 LED22_FREQ R/W VSB3V Description Tri-state (default). 0.5Hz (period is 2 seconds, duty cycle is 50%) 1 Hz (period is 1 second) Low.
LED output frequency. Bit 00 01 10 11 Description Tri-state (default). 0.5Hz (period is 2 seconds, duty cycle is 50%) 1 Hz (period is 1 second) Low.
3-2
LED21_FREQ
R/W
VSB3V
LED output frequency. Bit 00 01 10 11 Description Tri-state (default). 0.5Hz (period is 2 seconds, duty cycle is 50%) 1 Hz (period is 1 second) Low.
1-0
LED20_FREQ
R/W
VSB3V
LED output frequency. Bit 00 01 10 11 Description Tri-state (default). 0.5Hz (period is 2 seconds, duty cycle is 50%) 1 Hz (period is 1 second) Low.
7.9 LED Freq Control Register - Index 09h
Power-on default [7:0] =0000_0000b
Bit 7-6
Name LED27_FREQ
R/W R/W
PWR VSB3V LED output frequency. Bit
Description
Description
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00 01 10 11 5-4 LED26_FREQ R/W VSB3V Tri-state (default). 0.5Hz (period is 2 seconds, duty cycle is 50%) 1 Hz (period is 1 second) Low.
LED output frequency. Bit 00 01 10 11 Description Tri-state (default). 0.5Hz (period is 2 seconds, duty cycle is 50%) 1 Hz (period is 1 second) Low.
3-2
LED25_FREQ
R/W
VSB3V
LED output frequency. Bit 00 01 10 11 Description Tri-state (default). 0.5Hz (period is 2 seconds, duty cycle is 50%) 1 Hz (period is 1 second) Low.
1-0
LED24_FREQ
R/W
VSB3V
LED output frequency. Bit 00 01 10 11 Description Tri-state (default). 0.5Hz (period is 2 seconds, duty cycle is 50%) 1 Hz (period is 1 second) Low.
7.10 GPIO1x Output Control Register - Index 10h
Power-on default [7:0] =0000_0000b Bit 7 Name GP17_OCTRL R/W R/W PWR VSB3V Description GPIO 17 output control. Set to 1 for output function. Set to 0 for input function(default).
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6 GP16_OCTRL R/W VSB3V GPIO 16 output control. Set to 1 for output function. Set to 0 for input function(default). 5 GP15_OCTRL R/W VSB3V GPIO 15 output control. Set to 1 for output function. Set to 0 for input function(default). 4 GP14_OCTRL R/W VSB3V GPIO 14 output control. Set to 1 for output function. Set to 0 for input function(default). 3 GP13_OCTRL R/W VSB3V GPIO 13 output control. Set to 1 for output function. Set to 0 for input function(default). 2 GP12_OCTRL R/W VSB3V GPIO 12 output control. If this pin serves as IRQ/SMI#, this bit has no effect. Set to 1 for output function. Set to 0 for input function(default). 1 GP11_OCTRL R/W VSB3V GPIO 11 output control. Set to 1 for output function. Set to 0 for input function(default). 0 GP10_OCTRL R/W VSB3V GPIO 10 output control. Set to 1 for output function. Set to 0 for input function(default).
7.11 GPIO1x Output Data Register - Index 11h
Power-on default [7:0] =0000_0000b Bit 7 6 5 4 3 2 Name GP17_ODATA GP16_ODATA GP15_ODATA GP14_ODATA GP13_ODATA GP12_ODATA R/W R/W R/W R/W R/W R/W R/W PWR VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V GPIO 17 output data. GPIO 16 output data. GPIO 15 output data. GPIO 14 output data. GPIO 13 output data. GPIO 12 output data. If this pin serves as IRQ/SMI#, this bit has no effect. 1 0 GP11_ODATA GP10_ODATA R/W R/W VSB3V VSB3V GPIO 11 output data. GPIO 10 output data. Description
7.12 GPIO1x Input Status Register - Index 12h
Power-on default [7:0] =xxxx_xxxxb Bit 7 Name GP17_PSTS R/W RO PWR VSB3V Description Read the GPIO17 data on the pin.
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6 5 4 3 2 1 0 GP16_PSTS GP15_PSTS GP14_PSTS GP13_PSTS GP12_PSTS GP11_PSTS GP10_PSTS RO RO RO RO RO RO RO VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V Read the GPIO16 data on the pin. Read the GPIO15 data on the pin. Read the GPIO14 data on the pin. Read the GPIO13 data on the pin. Read the GPIO12 data on the pin. Read the GPIO11 data on the pin. Read the GPIO10 data on the pin.
7.13 GPIO1x Level/Pulse Control Register - Index 13h
Power-on default [7:0] =0000_0000b Bit 7 6 5 4 3 2 Name GP17_OMODE GP16_OMODE GP15_OMODE GP14_OMODE GP13_OMODE GP12_OMODE R/W R/W R/W R/W R/W R/W R/W PWR VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V Description GPIO 17 output mode. 0 - level, 1 - pulse. GPIO 16 output mode. 0 - level, 1 - pulse. GPIO 15 output mode. 0 - level, 1 - pulse. GPIO 14 output mode. 0 - level, 1 - pulse. GPIO 13 output mode. 0 - level, 1 - pulse. GPIO 12 output mode. 0 - level, 1 - pulse. If this serves as IRQ/SMI# mode, it will have same function. 1 0 GP11_OMODE GP10_OMODE R/W R/W VSB3V VSB3V GPIO 11 output mode. 0 - level, 1 - pulse. GPIO 10 output mode. 0 - level, 1 - pulse.
7.14 GPIO1x Pulse Width Control Register - Index 14h
Power-on default [7:0] =0000_0000b Bit 7:2 1:0 Name Reserved GP1_PSWDTH[1:0 ] R/W R/W R/W PWR VSB3V VSB3V Reserved. Read return 0. GPIO1x pulse width. If set the GPIO1x to pulse mode, the pulse width can be defined as follows. 00b - 500us (Default) 01b - 1ms 10b - 20ms 11b - 100ms Description
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7.15 GPIO1x Pull-up Resistor Control Register - Index 15h
Power-on default [7:0] =0000_0000b Bit 7 6 5 4 3 2 Name GP17_RESON GP16_RESON GP15_RESON GP14_RESON Reserved GP12_RESON R/W R/W R/W R/W R/W R/W R/W PWR VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V Set to 1, turn on the GPIO12 internal pull-up resistor. If this pin serves as IRQ/SMI#, this bit also control IRQ/SMI# pull-up switch. 1 0 GP11_RESON GP10_RESON R/W R/W VSB3V VSB3V Set to 1, turn on the GPIO11 internal pull-up resistor. Set to 1, turn on the GPIO10 internal pull-up resistor. Description Set to 1, turn on the GPIO17 internal pull-up resistor. Set to 1, turn on the GPIO16 internal pull-up resistor. Set to 1, turn on the GPIO15 internal pull-up resistor. Set to 1, turn on the GPIO14 internal pull-up resistor.
7.16 GPIO1x Input De-bounce Register - Index 16h
Power-on default [7:0] =0000_0000b Bit 7 Name GP17_ENDB R/W R/W PWR VSB3V Description Enable GPIO17 input de-bounce with 7u or 25ms second that selected by 0x1C bit7. 6 GP16_ENDB R/W VSB3V Enable GPIO16 input de-bounce with 7u or 25ms second that selected by 0x1C bit6. 5 GP15_ENDB R/W VSB3V Enable GPIO15 input de-bounce with 7u or 25ms second that selected by 0x1C bit5. 4 GP14_ENDB R/W VSB3V Enable GPIO14 input de-bounce with 7u or 25ms second that selected by 0x1C bit4. 3 GP13_ENDB R/W VSB3V Enable GPIO13 input de-bounce with 7u or 25ms second that selected by 0x1C bit3. 2 GP12_ENDB R/W VSB3V Enable GPIO12 input de-bounce with 7u or 25ms second that selected by 0x1C bit2. 1 GP11_ENDB R/W VSB3V Enable GPIO11 input de-bounce with 7u or 25ms second that selected by 0x1C bit1. 0 GP10_ENDB R/W VSB3V Enable GPIO10 input de-bounce with 7u or 25ms second that selected by 0x1C bit0.
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7.17 GPIO1x Pulse Inverse Register - Index 17h
Power-on default [7:0] =0000_0000b Bit 7 Name GP17_PULSINV R/W R/W PWR VSB3V Description GPIO 17 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR14. 6 GP16_PULSINV R/W VSB3V GPIO 16 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR14. 5 GP15_PULSINV R/W VSB3V GPIO15 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR14. 4 GP14_PULSINV R/W VSB3V GPIO14 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR14. 3 GP13_PULSINV R/W VSB3V GPIO13 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR14. 2 GP12_PULSINV R/W VSB3V GPIO12 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR14. If this pin services as IRQ/SMI#, this bit has no effect. 1 GP11_PULSINV R/W VSB3V GPIO 11 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR14. 0 GP10_PULSINV R/W VSB3V GPIO10 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR14.
7.18 GP1X Edge Detector Enable Register - Index 0x18
Power-on default [7:0] =0000_0000b Bit 7 Name EN_GP17EDGE R/W R/W PWR VSB3V Description Enable GPIO17 Edge Detector. If this bit set to 1 and GPIO17 set to
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input mode [CR10] will enable GPIO17 edge detection. Default is disable 6 EN_GP16EDGE R/W VSB3V Enable GPIO16 Edge Detector. If this bit set to 1 and GPIO16 set to input mode [CR10] will enable GPIO16 edge detection. Default is disable 5 EN_GP15EDGE R/W VSB3V Enable GPIO15 Edge Detector. If this bit set to 1 and GPIO15 set to input mode [CR10] will enable GPIO15 edge detection. Default is disable 4 EN_GP14EDGE R/W VSB3V Enable GPIO14 Edge Detector. If this bit set to 1 and GPIO14 set to input mode [CR10] will enable GPIO14 edge detection. Default is disable 3 EN_GP13EDGE R/W VSB3V Enable GPIO13 Edge Detector. If this bit set to 1 and GPIO13 set to input mode [CR10] will enable GPIO13 edge detection. Default is disable 2 EN_GP12EDGE R/W VSB3V Enable GPIO12 Edge Detector. If this bit set to 1 and GPIO12 set to input mode [CR10] will enable GPIO12 edge detection. Default is disable. If this bit serves as IRQ/SMI#, this bit has no effect. 1 EN_GP11EDGE R/W VSB3V Enable GPIO11 Edge Detector. If this bit set to 1 and GPIO11 set to input mode [CR10] will enable GPIO11 edge detection. Default is disable 0 EN_GP10EDGE R/W VSB3V Enable GPIO10 Edge Detector. If this bit set to 1 and GPIO10 set to input mode [CR10] will enable GPIO10 edge detection. Default is disable
7.19 GP1X Edge Detector Status Register - Index 0x19
Power-on default [7:0] =0000_0000b Bit 7 Name STS_GP17ED GE 6 STS_GP16ED GE 5 STS_GP15ED GE 4 STS_GP14ED GE RW VSB3V RW VSB3V RW VSB3V R/W RW PWR VSB3V Description Indicate GPIO17 Edge Status. If set to 1, the edge of GPIO17 has occurred. Writing 1 will clear this bit to 0. Writing 0 is invalid. Indicate GPIO16 Edge Status. If set to 1, the edge of GPIO16 has occurred. Writing 1 will clear this bit to 0. Writing 0 is invalid. Indicate GPIO15 Edge Status. If set to 1, the edge of GPIO15 has occurred. Writing 1 will clear this bit to 0. Writing 0 is invalid. Indicate GPIO14 Edge Status. If set to 1, the edge of GPIO14 has occurred. Writing 1 will clear this bit to 0. Writing 0 is invalid.
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3 STS_GP13ED GE 2 STS_GP12ED GE RW VSB3V RW VSB3V Indicate GPIO13 Edge Status. If set to 1, the edge of GPIO13 has occurred. Writing 1 will clear this bit to 0. Writing 0 is invalid. Indicate GPIO12 Edge Status. If set to 1, the edge of GPIO12 has occurred. Writing 1 will clear this bit to 0. Writing 0 is invalid. If this bit serves as IRQ/SMI#, this bit has no effect. 1 STS_GP11ED GE 0 STS_GP10ED GE RW VSB3V RW VSB3V Indicate GPIO11 Edge Status. If set to 1, the edge of GPIO11 has occurred. Writing 1 will clear this bit to 0. Writing 0 is invalid. Indicate GPIO10 Edge Status. If set to 1, the edge of GPIO10 has occurred. Writing 1 will clear this bit to 0. Writing 0 is invalid.
7.20 GP1X IRQ or SMI# Enable Register - Index 0x1A
Power-on default [7:0] =0000_0000b Bit 7 6 5 4 3 2 1 0 Name EN_GP17IRQ EN_GP16IRQ EN_GP15IRQ EN_GP14IRQ EN_GP13IRQ EN_GP12IRQ EN_GP11IRQ EN_GP10IRQ R/W R/W R/W R/W R/W R/W R/W R/W R/W PWR VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V Description Enable GPIO17 IRQ or SMI# Generation. If this bit set to 1, enable GPIO17 to generate IRQ or SMI#. Enable GPIO16 IRQ or SMI# Generation. If this bit set to 1, enable GPIO16 to generate IRQ or SMI#. Enable GPIO15 IRQ or SMI# Generation. If this bit set to 1, enable GPIO15 to generate IRQ or SMI#. Enable GPIO14 IRQ or SMI# Generation. If this bit set to 1, enable GPIO14 to generate IRQ or SMI#. Enable GPIO13 IRQ or SMI# Generation. If this bit set to 1, enable GPIO13 to generate IRQ or SMI#. Enable GPIO12 IRQ or SMI# Generation. If this bit set to 1, enable GPIO12 to generate IRQ or SMI#. Enable GPIO11 IRQ or SMI# Generation. If this bit set to 1, enable GPIO11 to generate IRQ or SMI#. Enable GPIO10 IRQ or SMI# Generation. If this bit set to 1, enable GPIO10 to generate IRQ or SMI#.
7.21 GP1X Output Driving Enable - Index 0x1B
Power-on default [7:0] =0000_1000b Bit 7 6 Name EN_GP17_OBUF EN_GP16_OBUF R/W R/W R/W PWR VSB3V VSB3V Description Enable GPIO17 drive high buffer. If this bit is set to 0, the pin GPIO17 will be I/OD pin, if set to 1 the pin GPIO17 is I/O pin. Enable GPIO16 drive high buffer. If this bit is set to 0, the pin GPIO16 will be I/OD pin, if set to 1 the pin GPIO16 is I/O pin.
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5 4 3 2 1 0 EN_GP15_OBUF EN_GP14_OBUF EN_GP13_OBUF EN_GP12_OBUF EN_GP11_OBUF EN_GP10_OBUF R/W R/W R/W R/W R/W R/W VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V Enable GPIO15 drive high buffer. If this bit is set to 0, the pin GPIO15 will be I/OD pin, if set to 1 the pin GPIO15 is I/O pin. Enable GPIO14 drive high buffer. If this bit is set to 0, the pin GPIO14 will be I/OD pin, if set to 1 the pin GPIO14 is I/O pin. Enable GPIO13 drive high buffer. If this bit is set to 0, the pin GPIO13 will be I/OD pin, if set to 1 the pin GPIO13 is I/O pin(default). Enable GPIO12 drive high buffer. If this bit is set to 0, the pin GPIO12 will be I/OD pin, if set to 1 the pin GPIO12 is I/O pin. Enable GPIO11 drive high buffer. If this bit is set to 0, the pin GPIO11 will be I/OD pin, if set to 1 the pin GPIO11 is I/O pin. Enable GPIO10 drive high buffer. If this bit is set to 0, the pin GPIO10 will be I/OD pin, if set to 1 the pin GPIO10 is I/O pin.
7.22 GP1X Output Driving Enable - Index 0x1C
Power-on default [7:0] =0000_0000b Bit 7 6 5 4 3 2 1 0 Name DB_TIME17_SEL DB_TIME16_SEL DB_TIME15_SEL DB_TIME14_SEL DB_TIME13_SEL DB_TIME12_SEL DB_TIME11_SEL DB_TIME10_SEL R/W R/W R/W R/W R/W R/W R/W R/W R/W PWR VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V Description Select GPIO17 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Select GPIO16 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Select GPIO15 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Select GPIO14 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Select GPIO13 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Select GPIO12 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Select GPIO11 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Select GPIO10 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default).
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7.23 GPIO2x Output Control Register - Index 20h
Power-on default [7:0] =0000_0000b Bit 7 Name GP27_OCTRL R/W R/W PWR VSB3V Description GPIO 27 output control. Set to 1 for output function. Set to 0 for input function(default). 6 GP26_OCTRL R/W VSB3V GPIO 26 output control. Set to 1 for output function. Set to 0 for input function(default). 5 GP25_OCTRL R/W VSB3V GPIO 25 output control. Set to 1 for output function. Set to 0 for input function(default). 4 GP24_OCTRL R/W VSB3V GPIO 24 output control. Set to 1 for output function. Set to 0 for input function(default). 3 GP23_OCTRL R/W VSB3V GPIO 23 output control. Set to 1 for output function. Set to 0 for input function(default). 2 GP22_OCTRL R/W VSB3V GPIO 22 output control. Set to 1 for output function. Set to 0 for input function(default). 1 GP21_OCTRL R/W VSB3V GPIO 21 output control. Set to 1 for output function. Set to 0 for input function(default). 0 GP20_OCTRL R/W VSB3V GPIO 20 output control. Set to 1 for output function. Set to 0 for input function(default).
7.24 GPIO2x Output Data Register - Index 21h
Power-on default [7:0] =0000_0000b Bit 7 6 5 4 Name GP27_ODATA GP26_ODATA GP25_ODATA GP24_ODATA R/W R/W R/W R/W R/W PWR VSB3V VSB3V VSB3V VSB3V GPIO 27 output data. GPIO 26 output data. GPIO 25 output data. GPIO 24 output data. Description
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3 2 1 0 GP23_ODATA GP22_ODATA GP21_ODATA GP20_ODATA R/W R/W R/W R/W VSB3V VSB3V VSB3V VSB3V GPIO 23 output data. GPIO 22 output data. GPIO 21 output data. GPIO 20 output data.
7.25 GPIO2x Input Status Register - Index 22h
Power-on default [7:0] =xxxx_xxxxb Bit 7 6 5 4 3 2 1 0 Name GP27_PSTS GP26_PSTS GP25_PSTS GP24_PSTS GP23_PSTS GP22_PSTS GP21_PSTS GP20_PSTS R/W RO RO RO RO RO RO RO RO PWR VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V Description Read the GPIO27 data on the pin. Read the GPIO26 data on the pin. Read the GPIO25 data on the pin. Read the GPIO24 data on the pin. Read the GPIO23 data on the pin. Read the GPIO22 data on the pin. Read the GPIO21 data on the pin. Read the GPIO20 data on the pin.
7.26 GPIO2x Level/Pulse Control Register - Index 23h
Power-on default [7:0] =0000_0000b Bit 7 6 5 4 3 2 1 0 Name GP27_OMODE GP26_OMODE GP25_OMODE GP24_OMODE GP23_OMODE GP22_OMODE GP21_OMODE GP20_OMODE R/W R/W R/W R/W R/W R/W R/W R/W R/W PWR VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V Description GPIO 27 output mode. 0 - level, 1 - pulse. GPIO 26 output mode. 0 - level, 1 - pulse. GPIO 25 output mode. 0 - level, 1 - pulse. GPIO 24 output mode. 0 - level, 1 - pulse. GPIO 23 output mode. 0 - level, 1 - pulse. GPIO 22 output mode. 0 - level, 1 - pulse. GPIO 21 output mode. 0 - level, 1 - pulse. GPIO 20 output mode. 0 - level, 1 - pulse.
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7.27 GPIO2x Pulse Width Control Register - Index 24h
Power-on default [7:0] =0000_0000b Bit 7:2 1:0 Name Reserved GP2_PLSWD[1:0 ] R/W R/W R/W PWR VSB3V VSB3V Reserved. Read return 0. GPIO2x pulse width. If set the GPIO2x to pulse mode, the pulse width can be defined as follows. 00b - 500us (Default) 01b - 1ms 10b - 20ms 11b - 100ms Description
7.28 GPIO2x Pull-up Resistor Control Register - Index 25h
Power-on default [7:0] =0000_0000b Bit 7 6 5 4 3 2 1 0 Name GP27_RESON GP26_RESON GP25_RESON GP24_RESON GP23_RESON GP22_RESON GP21_RESON GP20_RESON R/W R/W R/W R/W R/W R/W R/W R/W R/W PWR VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V Description Turn on the GPIO27 internal pull-up resistor. Turn on the GPIO26 internal pull-up resistor. Turn on the GPIO25 internal pull-up resistor. Turn on the GPIO24 internal pull-up resistor. Turn on the GPIO23 internal pull-up resistor. Turn on the GPIO22 internal pull-up resistor. Turn on the GPIO21 internal pull-up resistor. Turn on the GPIO20 internal pull-up resistor.
7.29 GPIO2x Input De-bounce Register - Index 26h
Power-on default [7:0] =0000_0000b Bit 7 Name GP27_ENDB R/W R/W PWR VSB3V Description Enable GPIO27 input de-bounce with 7u or 25ms second that selected by 0x2C bit7. 6 GP26_ENDB R/W VSB3V Enable GPIO26 input de-bounce with 7u or 25ms second that selected
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by 0x2C bit6. 5 GP25_ENDB R/W VSB3V Enable GPIO25 input de-bounce with 7u or 25ms second that selected by 0x2C bit5. 4 GP24_ENDB R/W VSB3V Enable GPIO24 input de-bounce with 7u or 25ms second that selected by 0x2C bit4. 3 GP23_ENDB R/W VSB3V Enable GPIO23 input de-bounce with 7u or 25ms second that selected by 0x2C bit3. 2 GP22_ENDB R/W VSB3V Enable GPIO22 input de-bounce with 7u or 25ms second that selected by 0x2C bit2. 1 GP21_ENDB R/W VSB3V Enable GPIO21 input de-bounce with 7u or 25ms second that selected by 0x2C bit1. 0 GP20_ENDB R/W VSB3V Enable GPIO20 input de-bounce with 7u or 25ms second that selected by 0x2C bit0.
7.30 GPIO2x Pulse Inverse Register - Index 27h
Power-on default [7:0] =0000_0000b Bit 7 Name GP27_PULSINV R/W R/W PWR VSB3V Description GPIO 27 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR24. 6 GP26_PULSINV R/W VSB3V GPIO 26 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR24. 5 GP25_PULSINV R/W VSB3V GPIO25 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR24. 4 GP24_PULSINV R/W VSB3V GPIO24 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR24. 3 GP23_PULSINV R/W VSB3V GPIO23 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR24. 2 GP22_PULSINV R/W VSB3V GPIO22 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in
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CR24. 1 GP21_PULSINV R/W VSB3V GPIO 21 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR24. 0 GP20_PULSINV R/W VSB3V GPIO20 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR24.
7.31 GP2x Edge Detector Enable Register - Index 0x28
Power-on default [7:0] =0000_0000b Bit 7 Name EN_GP27EDGE R/W R/W PWR VSB3V Description Enable GPIO27 Edge Detector. If this bit set to 1 and GPIO17 set to input mode [CR10] will enable GPIO27 edge detection. Default is disabled. 6 EN_GP26EDGE R/W VSB3V Enable GPIO26 Edge Detector. If this bit set to 1 and GPIO16 set to input mode [CR10] will enable GPIO26 edge detection. Default is disabled. 5 EN_GP25EDGE R/W VSB3V Enable GPIO25 Edge Detector. If this bit set to 1 and GPIO15 set to input mode [CR10] will enable GPIO25 edge detection. Default is disabled. 4 EN_GP24EDGE R/W VSB3V Enable GPIO24 Edge Detector. If this bit set to 1 and GPIO14 set to input mode [CR10] will enable GPIO24 edge detection. Default is disabled. 3 EN_GP23EDGE R/W VSB3V Enable GPIO23 Edge Detector. If this bit set to 1 and GPIO13 set to input mode [CR10] will enable GPIO23 edge detection. Default is disabled. 2 EN_GP22EDGE R/W VSB3V Enable GPIO22 Edge Detector. If this bit set to 1 and GPIO12 set to input mode [CR10] will enable GPIO22 edge detection. Default is disabled. 1 EN_GP21EDGE R/W VSB3V Enable GPIO21 Edge Detector. If this bit set to 1 and GPIO11 set to input mode [CR10] will enable GPIO21 edge detection. Default is disabled. 0 EN_GP20EDGE R/W VSB3V Enable GPIO20 Edge Detector. If this bit set to 1 and GPIO10 set to input mode [CR10] will enable GPIO20 edge detection. Default is
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disabled.
7.32 GP2X Edge Detector Status Register - Index 0x29
Power-on default [7:0] =0000_0000b Bit 7 Name STS_GP27EDGE R/W R/W PWR VSB3V Description Indicate GPIO27 Edge Status. If set to 1, the edge of GPIO27 has occurred. Write 1 to clear this bit. Writing 0 is invalid. 6 STS_GP26EDGE R/W VSB3V Indicate GPIO26 Edge Status. If set to 1, the edge of GPIO26 has occurred. Write 1 to clear this bit. Writing 0 is invalid. 5 STS_GP25EDGE R/W VSB3V Indicate GPIO25 Edge Status. If set to 1, the edge of GPIO25 has occurred. Write 1 to clear this bit. Writing 0 is invalid. 4 STS_GP24EDGE R/W VSB3V Indicate GPIO24 Edge Status. If set to 1, the edge of GPIO24 has occurred. Write 1 to clear this bit. Writing 0 is invalid. 3 STS_GP23EDGE R/W VSB3V Indicate GPIO23 Edge Status. If set to 1, the edge of GPIO23 has occurred. Write 1 to clear this bit. Writing 0 is invalid. 2 STS_GP22EDGE R/W VSB3V Indicate GPIO22 Edge Status. If set to 1, the edge of GPIO22 has occurred. Write 1 to clear this bit. Writing 0 is invalid. 1 STS_GP21EDGE R/W VSB3V Indicate GPIO11 Edge Status. If set to 1, the edge of GPIO21 has occurred. Write 1 to clear this bit. Writing 0 is invalid. 0 STS_GP20EDGE R/W VSB3V Indicate GPIO10 Edge Status. If set to 1, the edge of GPIO20 has occurred. Write 1 to clear this bit. Writing 0 is invalid.
7.33 GP2X IRQ or SMI# Enable Register - Index 0x2A
Power-on default [7:0] =0000_0000b Bit 7 Name EN_GP27IRQ R/W R/W PWR VSB3V Description Enable GPIO27 IRQ or SMI# Generation. If this bit set to 1, enable GPIO27 to generate IRQ or SMI#. 6 EN_GP26IRQ R/W VSB3V Enable GPIO26 IRQ or SMI# Generation. If this bit set to 1, enable GPIO26 to generate IRQ or SMI#. 5 EN_GP25IRQ R/W VSB3V Enable GPIO25 IRQ or SMI# Generation. If this bit set to 1, enable GPIO25 to generate IRQ or SMI#. 4 EN_GP24IRQ R/W VSB3V Enable GPIO24 IRQ or SMI# Generation. If this bit set to 1, enable
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GPIO24 to generate IRQ or SMI#. 3 EN_GP23IRQ R/W VSB3V Enable GPIO23 IRQ or SMI# Generation. If this bit set to 1, enable GPIO23 to generate IRQ or SMI#. 2 EN_GP22IRQ R/W VSB3V Enable GPIO22 IRQ or SMI# Generation. If this bit set to 1, enable GPIO22 to generate IRQ or SMI#. 1 EN_GP21IRQ R/W VSB3V Enable GPIO21 IRQ or SMI# Generation. If this bit set to 1, enable GPIO21 to generate IRQ or SMI#. 0 EN_GP20IRQ R/W VSB3V Enable GPIO20 IRQ or SMI# Generation. If this bit set to 1, enable GPIO20 to generate IRQ or SMI#.
7.34 GP2X Output Driving Enable - Index 0x2B
Power-on default [7:0] =0000_0000b Bit 7 Name EN_GP27_OBUF R/W R/W PWR VSB3V Description Enable GPIO27 drive high buffer. If this bit is set to 0, the pin GPIO27 will be I/OD pin, if set to 1 the pin GPIO17 is I/O pin. 6 EN_GP26_OBUF R/W VSB3V Enable GPIO26 drive high buffer. If this bit is set to 0, the pin GPIO26 will be I/OD pin, if set to 1 the pin GPIO26 is I/O pin. 5 EN_GP25_OBUF R/W VSB3V Enable GPIO25 drive high buffer. If this bit is set to 0, the pin GPIO25 will be I/OD pin, if set to 1 the pin GPIO25 is I/O pin. 4 EN_GP24_OBUF R/W VSB3V Enable GPIO24 drive high buffer. If this bit is set to 0, the pin GPIO24 will be I/OD pin, if set to 1 the pin GPIO24 is I/O pin. 3 EN_GP23_OBUF R/W VSB3V Enable GPIO23 drive high buffer. If this bit is set to 0, the pin GPIO23 will be I/OD pin, if set to 1 the pin GPIO23 is I/O pin. 2 EN_GP22_OBUF R/W VSB3V Enable GPIO22 drive high buffer. If this bit is set to 0, the pin GPIO22 will be I/OD pin, if set to 1 the pin GPIO22 is I/O pin. 1 EN_GP21_OBUF R/W VSB3V Enable GPIO21 drive high buffer. If this bit is set to 0, the pin GPIO21 will be I/OD pin, if set to 1 the pin GPIO21 is I/O pin. 0 EN_GP20_OBUF R/W VSB3V Enable GPIO20 drive high buffer. If this bit is set to 0, the pin GPIO20 will be I/OD pin, if set to 1 the pin GPIO20 is I/O pin.
7.35 GP2X Output Driving Enable - Index 0x2C
Power-on default [7:0] =0000_0000b Bit 7 Name DB_TIME27_SEL R/W R/W PWR VSB3V Description Select GPIO27 input de-bounce time. If set to 1 de-bounce time is
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25ms else if set to 0 de-bounce time is 7u(default). 6 5 4 3 2 1 0 DB_TIME26_SEL DB_TIME25_SEL DB_TIME24_SEL DB_TIME23_SEL DB_TIME22_SEL DB_TIME21_SEL DB_TIME20_SEL R/W R/W R/W R/W R/W R/W R/W VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V Select GPIO26 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Select GPIO25 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Select GPIO24 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Select GPIO23 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Select GPIO22 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Select GPIO21 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Select GPIO20 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default).
7.36 WDTOUT Control Register - Index 34h
Power-on default [7:0] =0000_0000b Bit 7-3 2 Name Reserved SEL_RST_2S R/W RO R/W VSB3V When set this bit to 1, the WDTOUT10 low pulse width is 2 Sec, if set to 0 the low pulse width is 100ms. 1 WDTOUT10_OIN V 0 STS_WDTOUT1 0 R/W VSB3V R/W VSB3V WDTOUT10# output level inverting. When write 1, the output pin will be inverted. Default is low active when time is out. Indicate WDTOUT10 is occurred. Write 1 to clear this bit. Writing 0 is invalid. PWR Description
7.37 WDTOUT10 Control Register - Index 35h
Power-on default [7:0] =0000_0000b Bit 7 Name WDT10_ENABLE R/W R/W PWR VSB3V Description Enable WDTOUT10 Output Timer. If set to 1, the WDTOUT10 timer will be started. When WDTOUT10# is asserted, low pulse is occurred.
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6-0 WD1_PTIME R/W VSB3V WDTOUT10 Pre-counter time in second. 000_0000b - 0 second (Default) 000_0001b - 1 second 000_0010b - 2 seconds : 111_1111b - 127 seconds
7.38 Watchdog Timer Control Register - Index 36h
Power-on default [7:0] =0000_0000b Bit 7 6 5 4 3 2 1-0 Name Reserved STS_WD_TMO UT WD_ENABLE WD_PULSE WD_UNIT WD_HACTIVE WD_PSWIDTH R/W RO R/W R/W R/W R/W R/W R/W PWR VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V VSB3V Reserved. Read will return 0. Watchdog is timeout. When the watchdog is timeout, this bit will be set to one. If set to 1, write 1 will clear this bit. Write 0, no effect. Enable watchdog timer. Watchdog output level or pulse. If set 0 (default), the pin of watchdog is level output. If write 1, the pin will output with a pulse. Watchdog unit select. Default 0 is select second. Write 1 to select minute. Program WD2 output level. If set to 1 and watchdog asserted, the pin will be high. If set to 0 and watchdog asserted, this pin will drive low(default). Watchdog pulse width selection. If the pin output is selected to pulse mode. The pulse width can be choice. 00b - 1m second. 01b - 20m second. 10b - 100m second 11b - 4 second The is flexible reset out with watchdog Description
7.39 Watchdog Timer Range Register - Index 37h
Power-on default [7:0] =0000_0000b Bit 7-0 Name WD_TIME R/W R/W PWR VSB3V Description Watchdog timing range from 0 ~ 255. The unit is either second or minute programmed by the watchdog timer control register bit3.
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7.40 GPIO3x Output Control Register - Index 40h
Power-on default [7:0] =0000_0000b Bit 7-4 3 2 1 0 Name Reserved GP33_OCTRL GP32_OCTRL GP31_OCTRL GP30_OCTRL R/W RO R/W R/W R/W R/W PWR VSB3V VSB3V VSB3V VSB3V VSB3V Read back will be zero GPIO 33 output control. Set to 1 for output function. Set to 0 for input function(default). GPIO 32 output control. Set to 1 for output function. Set to 0 for input function(default). GPIO 31 output control. Set to 1 for output function. Set to 0 for input function(default). GPIO 30 output control. Set to 1 for output function. Set to 0 for input function(default). Description
7.41 GPIO3x Output Data Register - Index 41h
Power-on default [7:0] =0000_0000b Bit 7-4 3 2 1 0 Name Reserved GP33_ODATA GP32_ODATA GP31_ODATA GP30_ODATA R/W RO R/W R/W R/W R/W PWR VSB3V VSB3V VSB3V VSB3V VSB3V Read back will be zero GPIO 33 output data. GPIO 32 output data. GPIO 31 output data. GPIO 30 output data. Description
7.42 GPIO3x Input Status Register - Index 42h
Power-on default [7:0] =xxxx_xxxxb Bit 7-4 3 2 1 0 Name Reserved GP33_PSTS GP32_PSTS GP31_PSTS GP30_PSTS R/W RO RO RO RO RO PWR VSB3V VSB3V VSB3V VSB3V VSB3V Read back will be zero Read the GPIO33 data on the pin. Read the GPIO32 data on the pin. Read the GPIO31 data on the pin. Read the GPIO30 data on the pin. Description
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7.43 GPIO3x Level/Pulse Control Register - Index 43h
Power-on default [7:0] =0000_0000b Bit 7-4 3 2 1 0 Name Reserved GP33_OMODE GP32_OMODE GP31_OMODE GP30_OMODE R/W RO R/W R/W R/W R/W PWR VSB3V VSB3V VSB3V VSB3V VSB3V Read back will be zero GPIO 33 output mode. 0 - level, 1 - pulse. GPIO 32 output mode. 0 - level, 1 - pulse. GPIO 31 output mode. 0 - level, 1 - pulse. GPIO 30 output mode. 0 - level, 1 - pulse. Description
7.44 GPIO3x Pulse Width Control Register - Index 44h
Power-on default [7:0] =0000_0000b Bit 7:2 1:0 Name Reserved GP3_PLSWD[1:0 ] R/W R/W R/W PWR VSB3V VSB3V Reserved. Read return 0. GPIO3x pulse width. If set the GPIO3x to pulse mode, the pulse width can be defined as follows. 00b - 500us (Default) 01b - 1ms 10b - 20ms 11b - 100ms Description
7.45 GPIO3x Input De-bounce Register - Index 46h
Power-on default [7:0] =0000_0000b Bit 7-4 3 Name Reserved GP33_ENDB R/W RO R/W PWR VSB3V VSB3V Read back will be zero Enable GPIO33 input de-bounce with 7u or 25ms second that selected by 0x4C bit3. 2 GP32_ENDB R/W VSB3V Enable GPIO32 input de-bounce with 7u or 25ms second that selected by 0x4C bit2. 1 GP31_ENDB R/W VSB3V Enable GPIO31 input de-bounce with 7u or 25ms second that selected by 0x4C bit1. 0 GP30_ENDB R/W VSB3V Enable GPIO30 input de-bounce with 7u or 25ms second that selected by 0x4C bit0. Description
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7.46 GPIO3x Pulse Inverse Register - Index 47h
Power-on default [7:0] =0000_0000b Bit 7-4 3 Name Reserved GP33_PULSINV R/W RO R/W PWR VSB3V VSB3V Read back will be zero GPIO33 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR44. 2 GP32_PULSINV R/W VSB3V GPIO32 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR44. 1 GP31_PULSINV R/W VSB3V GPIO 31 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR44. 0 GP30_PULSINV R/W VSB3V GPIO30 Pulse inversed. If the pulse inverse is selected, the output pulse is high pulse. Default low pulse. The pulse width is defined in CR44. Description
7.47 GP3x Edge Detector Enable Register - Index 0x48
Power-on default [7:0] =0000_0000b Bit 7-4 3 Name Reserved EN_GP33EDGE R/W RO R/W PWR VSB3V VSB3V Read back will be zero Enable GPIO33 Edge Detector. If set to 1, enable GPIO33 edge detection. Default is disable. 2 EN_GP32EDGE R/W VSB3V Enable GPIO32 Edge Detector. If set to 1, enable GPIO32 edge detection. Default is disable. 1 EN_GP31EDGE R/W VSB3V Enable GPIO31 Edge Detector. If set to 1, enable GPIO31 edge detection. Default is disable. 0 EN_GP30EDGE R/W VSB3V Enable GPIO30 Edge Detector. If set to 1, enable GPIO30 edge detection. Default is disable. Description
7.48 GP3X Edge Detector Status Register - Index 0x49
Power-on default [7:0] =0000_0000b
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Bit 7-4 3 Name Reserved STS_GP33EDGE R/W RO R/W PWR VSB3V VSB3V Read back will be zero Indicate GPIO33 Edge Status. If set to 1, the edge of GPIO33 has occurred. Write 1 to clear this bit. Writing 0 is invalid. 2 STS_GP32EDGE R/W VSB3V Indicate GPIO32 Edge Status. If set to 1, the edge of GPIO32 has occurred. Write 1 to clear this bit. Writing 0 is invalid. 1 STS_GP31EDGE R/W VSB3V Indicate GPIO31 Edge Status. If set to 1, the edge of GPIO31 has occurred. Write 1 to clear this bit. Writing 0 is invalid. 0 STS_GP30EDGE R/W VSB3V Indicate GPIO10 Edge Status. If set to 1, the edge of GPIO30 has occurred. Write 1 to clear this bit. Writing 0 is invalid. Description
7.49 GP3X IRQ or SMI# Enable Register - Index 0x4A
Power-on default [7:0] =0000_0000b Bit 7-4 3 Name Reserved EN_GP33IRQ R/W RO R/W PWR VSB3V VSB3V Read back will be zero Enable GPIO33 IRQ or SMI# Generation. If this bit set to 1, enable GPIO33 to generate IRQ or SMI#. 2 EN_GP32IRQ R/W VSB3V Enable GPIO32 IRQ or SMI# Generation. If this bit set to 1, enable GPIO32 to generate IRQ or SMI#. 1 EN_GP31IRQ R/W VSB3V Enable GPIO31 IRQ or SMI# Generation. If this bit set to 1, enable GPIO31 to generate IRQ or SMI#. 0 EN_GP30IRQ R/W VSB3V Enable GPIO30 IRQ or SMI# Generation. If this bit set to 1, enable GPIO30 to generate IRQ or SMI#. Description
7.50 GP3X Output Driving Enable - Index 0x4C
Power-on default [7:0] =0000_0000b Bit 7-4 3 2 Name Reserved DB_TIME33_SEL DB_TIME32_SEL R/W RO R/W R/W PWR VSB3V VSB3V VSB3V Read back will be zero Select GPIO33 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Select GPIO32 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Description
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1 0 DB_TIME31_SEL DB_TIME30_SEL R/W R/W VSB3V VSB3V Select GPIO31 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default). Select GPIO30 input de-bounce time. If set to 1 de-bounce time is 25ms else if set to 0 de-bounce time is 7u(default).
7.51 CHIPID(1) Register - Index 5Ah
Power-on default [7:0] =0000_0011b Bit 7-0 Name
CHIPID
R/W RO
PWR VSB3V Chip ID, High byte (8'h03).
Description
7.52 CHIPID(2) Register - Index 5Bh
Power-on default [7:0] =0000_0000b Bit 7-0 Name
CHIPID
R/W RO
PWR VSB3V Chip ID, Low byte (8'h00).
Description
7.53 VENDOR ID(1) Register - Index 5Dh
Power-on default [7:0] =0001_1001b Bit 7-0 Name
VENDOR1
R/W RO
PWR VSB3V Vendor ID, 8'h19
Description
7.54 VENDOR ID(2) Register - Index 5Eh
Power-on default [7:0] =0011_0100b Bit 7-0 Name
VENDOR2
R/W RO
PWR VSB3V Vendor ID, 8h34
Description
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F75111 8. Electron Characteristic
8.1 Absolute Maximum Ratings
PARAMETER Power Supply Voltage Input Voltage Operating Temperature Storage Temperature RATING -0.5 to 4.0 -0.5 to 5.5 -20 to +85 -55 to +150 UNIT V V C C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device.
8.2 DC Characteristics
(Ta = 0 C to 70 C, VDD = 3.3V 10%, VSS = 0V) (Note) PARAMETER SYM. MIN. TYP. MAX. UNIT CONDITIONS
I/O12t - TTL level bi-directional pin with source-sink capability of 12 mA Input Low Voltage Input High Voltage Output Low Current Output High Current Input High Leakage Input Low Leakage VIL VIH IOL IOH ILIH ILIL 2.0 10 12 -12 -10 +2 -2 0.8 V V mA mA A A VOL = 0.4V VOH = 2.4V VIN = VDD VIN = 0V
I/O12ts - TTL level bi-directional pin with source-sink capability of 12 mA and schmitt-trigger level input Input Low Threshold Voltage Input High Threshold Voltage Output Low Current Output High Current Input High Leakage Input Low Leakage VtVt+ IOL IOH ILIH ILIL 0.5 1.6 10 0.8 2.0 12 -12 -10 +2 -2 1.1 2.4 V V mA mA A A VDD = 3.3 V VDD = 3.3 V VOL = 0.4 V VOH = 2.4V VIN = VDD VIN = 0V
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8.2 DC Characteristics, continued PARAMETER SYM. MIN. TYP. MAX. UNIT CONDITIONS
OUT12t - TTL level output pin with source-sink capability of 12 mA Output Low Current Output High Current IOL IOH 12 16 -14 -12 mA mA VOL = 0.4V VOH = 2.4V
OD8 - Open-drain output pin with sink capability of 8 mA Output Low Current IOL 6 8 mA VOL = 0.4V
OD16 - Open-drain output pin with sink capability of 16 mA Output Low Current IOL 12 16 mA VOL = 0.4V
I/OOD16ts - TTL level bi-directional pin, can select to OD or OUT by register, with 16 mA source-sink capability Input Low Threshold Voltage Input High Threshold Voltage Output Low Current Output High Current Input High Leakage Input Low Leakage INt - TTL level input pin Input Low Voltage Input High Voltage Input High Leakage Input Low Leakage VIL VIH ILIH ILIL 2.0 +2 -2 0.8 V V A A VIN = VDD VIN = 0 V VtVt+ IOL IOH ILIH ILIL 0.5 1.6 6 0.8 2.0 8 -16 -12 +2 -2 1.1 2.4 V V mA mA A A VDD = 3.3 V VDD = 3.3 V VOL = 0.4 V VOH = 2.4V VIN = VDD VIN = 0V
INts - TTL level Schmitt-triggered input pin Input Low Threshold Voltage Input High Threshold Voltage Input High Leakage Input Low Leakage VtVt+ ILIH ILIL 0.5 1.6 0.8 2.0 1.1 2.4 +2 -2 V V A A VDD = 3.3V VDD = 3.3V VIN = VDD VIN = 0 V
Note: All parameters tested at specific temperature. Specifications over temperature are guaranteed by design.
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8.3 AC Characteristics
t SCL t t R R
SCL
t HD;SDA
t t SU;DAT SU;STO
SDA IN VALID DATA
t HD;DAT
SDA OUT
Serial Bus Timing Diagram
Serial Bus Timing PARAMETER SCL clock period Start condition hold time Stop condition setup-up time DATA to SCL setup time DATA to SCL hold time (data input) SCL and SDA rise time SCL and SDA fall time
Note : Timing spec. guaranteed by design
SYMBOL t SCL tHD;SDA tSU;STO tSU;DAT tHD;DAT tR tF
-
MIN. 2.5 0.6 0.6 120 5
MAX.
UNIT uS uS uS nS nS
1.0 300
uS nS
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F75111 9. Ordering Information
Part Number Package Type 28 PIN SSOP 28 PIN SSOP(Green Package) 24 PIN QFN (Green Package) Commercial, 0C to +70C Production Flow Commercial, 0C to +70C
F75111R F75111RG F75111N
10. Package Dimensions
F75111R/RG 28SSOP(150mil)
Symbol
Dimension in mm Min Nom
1.63 0.15
Dimension in inch Min
0.053 0.004
Max
1.75 0.25 0.50
Nom Max
0.064 0.069 0.006 0.010 0.059
A A1 A2 B c e D E E1 L H ZD
1.35 0.10
0.20 0.18
0.30 0.25 0.635 BASIC
0.008 0.007
0.012 0.010
0.025BASIC 0.390 0.394 0.236 0.244 0.154 0.157 0.025 0.050 0.020 0.033 REF
9.80 5.79 3.81 0.41 0.25
9.91 5.99 3.91 0.635
10.01 0.386 6.20 3.99 1.27 0.50 0.228 0.150 0.016 0.010
0.838 REF 0
0
8
0
0
0
8
0
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F75111N 24QFN(4mm x 4mm)
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Feature Integration Technology Inc.
Headquarters 3F-7, No 36, Tai Yuan St., Chupei City, Hsinchu, Taiwan 302, R.O.C. TEL : 886-3-5600168 FAX : 886-3-5600166 www: http://www.fintek.com.tw
Taipei Office Bldg. K4, 7F, No.700, Chung Cheng Rd., Chungho City, Taipei, Taiwan 235, R.O.C. TEL : 866-2-8227-8027 FAX : 866-2-8227-8037
Please note that all datasheet and specifications are subject to change without notice. All the trade marks of products and companies mentioned in this datasheet belong to their respective owner
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F75111 Demo Circuit
VCC3V VCC3V VCC3V
16 15 14 13 12 11 10 9
R1 10K
R2 10K
R3 10K
R4 10K
VCC3V R6 10K C1 0.1U R7 10K
16 15 14 13 12 11 10 9 R5 10K U1 VSB3V GPIO30 GPIO13/I2C_ADDR GPIO16 GPIO17 GPIO20 GPIO21 GPIO22 GPIO14 GPIO10 GPIO11 GPIO12 SDA SCLK F75111R GND GPIO31 GPIO32 GPIO33 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27 GPIO15 VSB3V GND GND RSTOUT# 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 I2C_ADDR 3 4 5 6 7 8 9 10 11 12 13 14 1 2 3 4 5 6 7 8 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 VCC3V WDOUT# C2 0.1U
GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 SDATA SCLK
1 2 3 4 5 6 7 8
ALL R VALUE IS 1K OHM
ADDRESS SELECT
VSB3V R8 I2C_ADDR 10K
R8 ON R8 OFF
ADDRESS=0x6Eh ADDRESS=0X9Ch
Title Feature IntegrationTechnology Inc. Size A Date: Document Number F75111R f or GPIO Thursday , March 06, 2003 Sheet 1 of 1 Rev 0.1
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